Principal Engineer, Power Integrity

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell is seeking a talented senior-level Power Integrity Engineer to join our Platform Engineering team, supporting board, switch, and optics development for next-generation platform solutions. This role drives execution across highly complex, cross-functional programs addressing some of the most demanding challenges in AI, wired and wireless communications, and critical infrastructure markets.
This role is responsible for power delivery network (PDN) analysis, power plane design, and verification across board, switch, and optical platforms operating at high-speed data rates. You will partner closely with circuit design, packaging technology, and board design teams to define and implement power delivery solutions that meet internal specifications and customer requirements.
You will operate in a highly visible technical environment, providing power integrity expertise, design guidance, and lab-based validation while engaging with cross-functional engineering teams and customers to ensure platform designs meet performance, quality, and schedule objectives.

What You Can Expect

• Own end-to-end power integrity analysis including SoC package, board, and system-level power domains across board, switch, and optics platforms to ensure performance meets specifications
• Develop PDN target impedance specifications and decoupling capacitor strategies, and translate power supply requirements into board and package design
• Perform power plane design, modeling, and analysis, and generate package and PCB models to support PI simulation and measurement correlation
• VRM/regulator behavior, loop stability and control-loop interaction with the PDN, transient/load-step response, and voltage droop.
• Support optics integration by evaluating power delivery paths and ensuring power integrity across board-to-module and module-to-switch interfaces
• Develop PI methodologies, rules, and workflows to meet platform-level specifications across critical power domains
• Work closely with packaging, board layout, and switch architecture teams in defining PI specifications, reviewing designs, and providing feedback for improvements
• Provide customer-facing PI specifications and ongoing support for customer board design reviews and power delivery analysis
• Perform VNA and TDR-based lab measurements to correlate simulation results with real-world power delivery performance
• Mentor junior engineers in developing their power integrity skills and provide technical guidance
• Proactively identify power integrity risks across the platform stack, develop mitigation strategies, and escalate issues as needed to drive resolution

What We're Looking For

• Bachelor's degree in Electrical Engineering or related field and 10-15 years of related professional experience; Master's degree and/or PhD in Electrical Engineering or related field with 5-10 years of experience
• Strong fundamentals in EM, transmission lines, and microwave theory, with in-depth knowledge of PDN analysis and high-speed differential and single-ended signals
• Proficiency in power plane design, modeling, and analysis using tools such as PowerSI, SIwave, or Cadence Sigrity
• Experience with 2-D and 3-D EM simulation tools such as Ansys HFSS, HSPICE, ADS, or COMSOL
• Experience with VNA and TDR measurements for board and package characterization, along with hands-on lab equipment experience such as oscilloscopes and logic analyzers
• Familiarity with decoupling capacitor placement strategies and AC impedance targets across board, switch, and optics platforms
• Working experience in EM field solvers and time/frequency domain tools for power domain analysis on SoC, SerDes, and critical power domains
• Understanding, debugging, and simulation of EMI/EMC problems related to power delivery
• Ability to automate PI, and packaging activities using scripting tools like Python
• Strong analytical, problem-solving, and debug skills, with an inherent sense of urgency and accountability

Expected Base Pay Range (USD)

150,680 - 225,700, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.


This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.


Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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